In the framework of a High-K/Metal Gate MOSFET technology, it is well known that a high-k gate dielectric has higher interface charges and fixed charges with respect to a standard SiO2 dielectric. This provides a detrimental effect on the threshold voltage (Vt) of the device, as well as on its mobility, and has a negative impact on the reliability of the device. To achieve low Vt process, an appropriate metal gate electrode can be selected and/or appropriate capping layers and/or gate implant processes can be used in the state of the art. Using appropriate capping layers and/or appropriate gate implant processes is based on physical or chemical approaches, and aims at a reduction of the oxygen vacancies or creation of additional dipoles.
There exists a need for alternative and improved methods for tuning the effective work function of a High-k/Metal gate transistor device.